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Your search returned 26 records. Click on the hyperlinks to view further details of Titles.. |
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Magazine Name : Ieee Journal Of Solid-State Circuits
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Year : 2005 Volume number : 40 Issue: 04 |
A 20-Gb/S 0.13-Um Cmos Serial Link Transmitter Using An Lc-Pll To Directly Drive The Output Multiplexer
(Article)
Subject:
High-Speed I/O
,
Lc Oscillators
,
Multiplexing
,
Oc-192
Author:
Patrick
Chiang
William J.
Dally
page:
1004
-
1011
Autonomous Dual-Mode (Pam2/4) Serial Link Transceiver With Adaptive Equalization And Data Recovery
(Article)
Subject:
Adaptive Equalization
,
Back-Channel
,
Common-Mode
,
Data Recovery
Author:
Vladimir
Stojanovic
Andrew
Ho
page:
1012
-
1026
A 1.25-Gb/S Cmos Burst-Mode Optical Transceiver For Ethernet Pon System
(Article)
Subject:
0.25 Um
,
1.25-Gb/S
,
Automatic Gain Control (Agc)
,
Automatic Power Control (Apc)
Author:
Kazuko
Nishimura
Hiroshi
Kimura
page:
1027
-
1034
A Built-In Technique For Probing Power Supply And Ground Noise Distribution Within Large-Scale Digital Integrated Circuits
(Article)
Subject:
Embedded Detector
,
Ground Noise
,
Power Supply Noise
,
Signal Integrity
Author:
Makoto
Nagata
Takeshi
Okumoto
page:
813
-
819
Circuits And Techniques For High-Resolution Measurement Of On-Chip Power Supply Noise
(Article)
Subject:
Analog-Digital Conversion
,
Power Delivery Validation
,
Random Noise
,
Spectral Measurement
Author:
Elad
Alon
Vladimir
Stojanovic
page:
820
-
828
Analysis And Design Of Inductive Coupling And Transceiver Circuit For Inductive Inter-Chip Wireless Superconnect
(Article)
Subject:
High Bandwidth
,
Inductor
,
Low Power
,
Sip
Author:
Noriyuki
Miura
Daisuke
Mizoguchi
page:
829
-
837
A 233-Mhz 80%-87% Efficient Four-Phase Dc-Dc Converter Utilizing Air-Core Inductors On Package
(Article)
Subject:
Buck Converter
,
Cmos
,
Dc-Dc Converter
Author:
Peter
Hazucha
Gerhard
Schrom
page:
838
-
845
Implicit Dc-Dc Downconversion Through Charge-Recycling
(Article)
Subject:
Dc-Dc Conversion
,
Power Management
Author:
Saravanan
Rajapandian
Zheng
Xu
page:
846
-
852
A Large-Scale And Low-Power Cam Architecture Featuring A One-Hot-Spot Block Code For Ip-Address Lookup In A Network Router
(Article)
Subject:
Associative Memory
,
Content Addressable Memory (Cam)
,
Dram
,
Hierarchical Match-Line Structure
Author:
Satoru
Hanzawa
Takeshi
Sakata
page:
853
-
861
1.8-V 800-Mb/S/Pin Ddr2 And 2.5-V 400-Mb/S/Pin Ddr1 Compatibly Designed 1-Gb Sdram With Dual-Clock Input-Latch Scheme And Hybrid Multi-Oxide Output Buffer
(Article)
Subject:
Clock
,
Clock Generation
,
Cmos
,
Double Data Rate (Ddr)
Author:
Hiroki
Fujisawa
Masayuki
Nakamura
page:
862
-
869
A Low-Power Four-Transistor Sram Cell With A Stacked Vertical Poly-Silicon Pmos And A Dual-Word-Voltage Scheme
(Article)
Subject:
Cmos Memory Circuits
,
Low Standby Leakage
,
Sram
,
Vertical Mosfet
Author:
Akira
Kotabe
Kenichi
Osada
page:
870
-
876
A 130-Nm 0.9-V 66-Mhz 8-Mb (256k *32) Local Sonos Embedded Flash Eeprom
(Article)
Subject:
Eeprom
,
Embedded Flash Memory
,
Flash Memory
,
High Frequency
Author:
Myoung-Kyu
Seo
Soung-Hoon
Sim
page:
877
-
883
A Novel Dynamic Memory Cell With Internal Voltage Gain
(Article)
Subject:
Dynamic Memory
,
Gain Cell
,
Gated Diode
,
Memory Cell With Internal Voltage Gain
Author:
Wing K.
Luk
Robert H.
Dennard
page:
884
-
894
Sram Design On 65-Nm Cmos Technology With Dynamic Sleep Transistor For Leakage Reduction
(Article)
Subject:
Leakage Reduction
,
Sleep Transistor
,
Sram
,
Weak-Write Test Mode
Author:
Kevin
Zhang
Uddalak
Bhattacharya
page:
895
-
901
A 16-Mb Mram Featuring Bootstrapped Write Drivers
(Article)
Subject:
16-Mb
,
Itimtj
,
Architecture
,
Bootstrap
Author:
Dietmar
Gogl
Christian
Arndt
page:
902
-
908
A 1.8-Ghz Lc Vco With 1.3-Ghz Tuning Range And Digital Amplitude Calibration
(Article)
Subject:
Amplitude Calibration
,
Band-Switching
,
Lc Vco
,
Phase Noise
Author:
Axel D.
Berny
M.
Niknejad
page:
909
-
917
A Third-Order Modulator In 0.18-M Cmos With Calibrated Mixed-Mode Integrators
(Article)
Subject:
Analog-Digital Conversion
,
Calibration
,
Sigma-Delta Modulation
Author:
Jae Hoon
Shim
In-Cheol
Park
page:
918
-
925
A Low-Power And Compact Cdma Matched Filter Based On Switched-Current Technology
(Article)
Subject:
Code-Division Multiple Access (Cdma)
,
Floating Gate Mos
,
Matched Filter
,
Neuron Mos
Author:
Toshihiko
Yamasaki
Tomoyuki
Nakayama
page:
926
-
932
Area-Efficien Linear Regulator With Ultra-Fast Load Regulation
(Article)
Subject:
Linear Regulator
,
Low-Dropout Regulator
Author:
Peter
Hazucha
Tanay
Karnik
page:
933
-
940
A Background Optimization Method For Pll By Measuring Phase Jitter Performance
(Article)
Subject:
Background
,
Cmos
,
Noise Suppression
,
Optimization
Author:
Shiro
Dosho
Naoshi
Yanagisawa
page:
941
-
950
Cmos Monolithic Mechatronic Microsystem For Surface Imaging And Force Response Studies
(Article)
Subject:
Atomic Force Microscopy
,
Cmos-Based Micro-System
,
Force Sensor
,
Mems
Author:
Diego
Barrettino
Sadik
Hafizovic
page:
951
-
959
A 0.9-V 12-Mw 5-Msps Algorithmic Adc With 77-Db Sfdr
(Article)
Subject:
Algorithmic Adc
,
Background Digital Calibration
,
Low Voltage
,
Pipelined Adc
Author:
Jipeng
Li
Gil-Cho
Ahn
page:
960
-
969
A 72-Mw Cmos 802.11a Direct Conversion Front-End With 3.5-Db Nf And 200-Khz 1/F Noise Corner
(Article)
Subject:
1/F Corner
,
Cmos Receiver
,
Low Power Dissipation
,
Quadrature
Author:
Mario
Valla
Giampiero
Montagna
page:
970
-
977
A 5-6.4-Gb/S 12-Channel Transceiver With Pre-Emphasis And Equalization
(Article)
Subject:
Adaptive Equalization
,
Cmos Integrated Circuits
,
Multichannel Transceiver
,
Pre-Emphasis Filter
Author:
Hirohito
Higashi
Syunitirou
Masaki
page:
978
-
985
A 10-Gb/S Receiver With Series Equalizer And On-Chip Isi Monitor In 0.11-Um Cmos
(Article)
Subject:
Clock And Data Recovery (Cdr)
,
Cmos
,
Intersymbol Interference (Isi )
,
Equalizer
Author:
Yasumoto
Tomita
Masaya
Kibune
page:
986
-
993
A 2.5-V 45-Gb/S Decision Circuit Using Sige Bicmos Logic
(Article)
Subject:
Bicmos
,
Current-Mode Logic
,
Flip-Flop
,
Low-Noise
Author:
Timothy O.
Dickson
Rudy
Beerkens
page:
994
-
1003
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